Design and Implementation of Communication and Switching Techniques for the Pleiades Family of Processors

Martin Benes, M.S. 2000, (advisor: Jan Rabaey).

The target of the Pleiades architecture were applications with a dominant DSP component. Each application would be partitioned using software tools into components. Each component would be delegated to a hardware that can execute it most efficiently | taking into account energy and performance. This work documents the efforts to improve the Pleiades architecture to make it more efficient and versatile while not sacrificing power or performance.