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Low Energy Field Programmable
Gate Array
Varghese George, Ph.D. 2000
(advisor: Jan Rabaey)..
Integrated circuits in the
form of Application Specific Integrated Circuits (ASIC) and general-purpose
processors have been traditionally used to meet the computational needs for
processing information. ASICs can be used to realize fixed applications that
have to be executed with the minimum amount of area, delay and energy costs. As
the size of the application becomes larger, it becomes practically impossible to
implement it in silicon. This is where the general-purpose processor steps in.
By breaking the application into smaller functions, it is possible to execute
each function sequentially in time. This makes it possible to reuse a single
piece of silicon to perform a variety of tasks. Realization of applications
using processors based on a set of general-purpose instructions can often result
in an inefficient implementation. Enhancing the instruction set to provide
specialized complex instruction is not a viable solution as the problem space
keeps expanding.
The reconfigurable
computing domain is aimed at this problem space between ASICs and
general-purpose processors. The FPGA can be programmed to compute the problem at
hand. The goal of reconfigurable architectures is to achieve implementation
efficiency approaching that of specialized logic while providing the silicon
reusability of general-purpose processors. Filed Programmable Gate Arrays (FPGA)
belong to this class of architectures and analysis of this approach has shown
higher functional density than general-purpose computers.
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